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1-216 h high cmr isolation amplifiers technical data hcpl-7800 hcpl-7800a hcpl-7800b applications, we recommend the hcpl-7800 which exhibits a part-to-part gain tolerance of 5%. for precision applications, hp offers the hcpl-7800a and hcpl-7800b, each with part-to- part gain tolerances of 1%. the hcpl-7800 utilizes sigma- delta ( sd ) analog-to-digital converter technology, chopper stabilized amplifiers, and a fully differential circuit topology fabricated using hps 1 m m cmos ic process. the part also couples our high-efficiency, high- speed algaas led to a high- speed, noise-shielded detector ? switch-mode power supply signal isolation ? general purpose analog signal isolation ? transducer isolation description the hcpl-7800 high cmr isolation amplifier provides a unique combination of features ideally suited for motor control circuit designers. the product provides the precision and stability needed to accurately monitor motor current in high- noise motor control environ- ments, providing for smoother control (less torque ripple) in various types of motor control applications. this product paves the way for a smaller, lighter, easier to produce, high noise rejection, low cost solution to motor current sensing. the product can also be used for general analog signal isolation applications requiring high accuracy, stability and linearity under similarly severe noise conditions. for general caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. functional diagram features ? 15 kv/ m s common-mode rejection at v cm = 1000 v* ? compact, auto-insertable standard 8-pin dip package ? 4.6 m v/ c offset drift vs. temperature ? 0.9 mv input offset voltage ? 85 khz bandwidth ? 0.1% nonlinearity ? worldwide safety approval: ul 1577 (3750 v rms/1 min), vde 0884 and csa ? advanced sigma-delta ( sd ) a/d converter technology ? fully differential circuit topology ? 1 m m cmos ic technology applications ? motor phase current sensing ? general purpose current sensing ? high-voltage power source voltage monitoring *the terms common-mode rejection (cmr) and isolation-mode rejection (imr) are used interchangeably throughout this data sheet. 1 2 3 4 8 7 6 5 v dd1 v in+ v in- gnd1 v dd2 v out+ v out- gnd2 cmr shield i dd1 i dd2 i in i o + + - - 5965-3592e
1-217 ordering information: hcpl-7800x no specifier = 5% gain tol.; mean gain value = 8.00 a = 1% gain tol.; mean gain value = 7.93 b = 1% gain tol.; mean gain value = 8.07 option yyy 300 = gull wing surface mount lead option 500 = tape/reel package option (1 k min.) option datasheets available. contact your hewlett-packard sales representative or authorized distributor for information. using our patented light-pipe optocoupler packaging technology. together, these features deliver unequaled isolation-mode noise rejection, as well as excellent offset and gain accuracy and stability over time and tempera- ture. this performance is delivered in a compact, auto- insertable, industry standard 8- package outline drawings standard dip package pin dip package that meets worldwide regulatory safety standards (gull-wing surface mount option #300 also available). 9.40 (0.370) 9.90 (0.390) pin one 1.78 (0.070) max. 1.19 (0.047) max. hp 7800 yyww date code 0.76 (0.030) 1.24 (0.049) 2.28 (0.090) 2.80 (0.110) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. 6.10 (0.240) 6.60 (0.260) 0.20 (0.008) 0.33 (0.013) 5?typ. 7.36 (0.290) 7.88 (0.310) * type number for: hcpl-7800 = 7800 1 2 3 4 8 7 6 5 5 6 7 8 4 3 2 1 gnd1 v dd1 v in+ v in gnd2 v dd2 v out+ v out pin diagram pin one type number* hcpl-7800a = 7800a hcpl-7800b = 7800b dimensions in millimeters and (inches).
1-218 maximum solder reflow thermal profile 240 d t = 115?, 0.3?/sec 0 d t = 100?, 1.5?/sec d t = 145?, 1?/sec time ?minutes temperature ?? 220 200 180 160 140 120 100 80 60 40 20 0 260 123 456789101112 (note: use of non-chlorine activated fluxes is recommended.) gull wing surface mount option 300* 0.635 ?0.25 (0.025 ?0.010) 12?nom. 0.20 (0.008) 0.33 (0.013) 9.65 ?0.25 (0.380 ?0.010) 0.51 ?0.130 (0.020 ?0.005) 7.62 ?0.25 (0.300 ?0.010) 5 6 7 8 4 3 2 1 9.65 ?0.25 (0.380 ?0.010) 6.350 ?0.25 (0.250 ?0.010) 1.02 (0.040) 1.19 (0.047) 1.19 (0.047) 1.78 (0.070) 9.65 ?0.25 (0.380 ?0.010) 4.83 (0.190) typ. 0.380 (0.015) 0.635 (0.025) pin location (for reference only) 1.080 ?0.320 (0.043 ?0.013) 4.19 (0.165) max. 1.780 (0.070) max. 1.19 (0.047) max. 2.540 (0.100) bsc dimensions in millimeters (inches). tolerances (unless otherwise specified): * refer to option 300 data sheet for more information. xx.xx = 0.01 xx.xxx = 0.005 hp 7800 yyww molded lead coplanarity maximum: 0.102 (0.004)
1-219 vde 0884 (06.92) insulation characteristics description symbol characteristic unit installation classification per din vde 0110, table 1 for rated mains voltage 300 v rms i-iv for rated mains voltage 600 v rms i-iii climatic classification 40/100/21 pollution degree (din vde 0110, table 1)* 2 maximum working insulation voltage v iorm 848 v peak input to output test voltage, method b** v pr 1591 v peak v pr = 1.875 x v iorm , production test with t p = 1 sec, partial discharge < 5 pc input to output test voltage, method a** v pr 1273 v peak v pr = 1.5 x v iorm , type and sample test with t p = 60 sec, partial discharge < 5 pc highest allowable overvoltage** (transient overvoltage t tr = 10 sec) v tr 6000 v peak safety-limiting values (maximum values allowed in the event of a failure, also see figure 27) case temperature t s 175 c input power p s,input 80 mw output power p s,output 250 mw insulation resistance at t s , v io = 500 v r s 3 1x10 12 w *this part may also be used in pollution degree 3 environments where the rated mains voltage is 300 v rms (per din vde 0110). **refer to the front of the optocoupler section of the current catalog for a more detailed description of vde 0884 and other product safety requirements. note: optocouplers providing safe electrical separation per vde 0884 do so only within the safety-limiting values to which they are qualified. protective cut-out switches must be used to ensure that the safety limits are not exceeded. regulatory information the hcpl-7800 has been approved by the following organizations: ul recognized under ul 1577, component recognition program, file e55361. csa approved under csa component acceptance notice #5, file ca 88324. insulation and safety related specifications parameter symbol value units conditions min. external air gap l(io1) 7.4 mm measured from input terminals to output terminals, (external clearance) shortest distance through air min. external tracking l(io2) 8.0 mm measured from input terminals to output terminals, path (external creepage) shortest distance path along body min. internal plastic gap 0.5 mm through insulation distance, conductor to conductor, (internal clearance) usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity tracking resistance cti 175 v din iec 112/vde 0303 part 1 (comparative tracking index) isolation group iii a material group (din vde 0110, 1/89, table 1) option 300 C surface mount classification is class a in accordance with cecc 00802. vde approved according to vde 0884/06.92.
1-220 absolute maximum ratings parameter symbol min. max. unit note storage temperature t s -55 125 c ambient operating temperature t a - 40 100 c supply voltages v dd1 , v dd2 0.0 5.5 v steady-state input voltage v in+ , v in- -2.0 v dd1 +0.5 v two second transient input voltage -6.0 output voltages v out+ , v out- -0.5 v dd2 +0.5 v lead solder temperature t ls 260 c1 (1.6 mm below seating plane, 10 sec.) reflow temperature profile see package outline drawings section recommended operating conditions parameter symbol min. max. unit note ambient operating temperature t a -40 85 c2 supply voltages v dd1 , v dd2 4.5 5.5 v 3 input voltage v in+ , v in- -200 200 mv 4 output current |i o |1ma5
1-221 dc electrical specifications all specifications and figures are at the nominal operating condition of v in+ = 0 v, v in- = 0 v, t a = 25 c, v dd1 = 5.0 v, and v dd2 = 5.0 v, unless otherwise noted. parameter symbol min. typ. max. unit test conditions fig. note input offset voltage v os -1.8 -0.9 0.0 mv 1 input offset drift vs. dv os /dt -2.1 m v/ c 1, 2 6 temperature abs. value of input |dv os /dt| 4.6 m v/ c17 offset drift vs. temperature input offset drift vs. v dd1 dv os /dv dd1 30 m v/v 1, 3 8 input offset drift vs. v dd2 dv os /dv dd2 -40 m v/v 1, 4 9 gain ( 5% tol.) g 7.61 8.00 8.40 -200 mv < v in+ < 200 mv 1, 5 10 gain - a version ( 1% tol.) g a 7.85 7.93 8.01 gain - b version ( 1% tol.) g b 7.99 8.07 8.15 gain drift vs. temperature dg/dt 0.001 %/ c 5, 6 11 abs. value of gain drift vs. |dg/dt| 0.001 %/ c512 temperature gain drift vs. v dd1 dg/dv dd1 0.21 %/v 5, 7 13 gain drift vs. v dd2 dg/dv dd2 -0.06 %/v 5, 8 14 200 mv nonlinearity nl 200 0.2 0.35 % 5, 9 15 200 mv nonlinearity drift dnl 200 /dt -0.001 % pts/ c5, 1016 vs. temperature 200 mv nonlinearity drift dnl 200 /dv dd1 -0.005 % pts/v 5, 11 17 vs. v dd1 200 mv nonlinearity drift dnl 200 /dv dd2 -0.007 % pts/v 5, 12 18 vs. v dd2 100 mv nonlinearity nl 100 0.1 0.25 % -100 mv< v in+ < 100 mv 5, 13 19 maximum input voltage |v in+ | max 300 mv 14 before output clipping average input bias current i in -670 na 15, 16 20 input bias current di in /dt 3 na/ c temperature coefficient average input resistance r in 530 k w 15 20 input resistance dr in /dt 0.38 %/ c temperature coefficient input dc common-mode cmrr in 72 db 21 rejection ratio output resistance r o 11 w 5 output resistance dr o /dt 0.6 %/ c temperature coefficient output low voltage v ol 1.18 v |v in+ | = 500 mv 14 22 output high voltage v oh 3.61 v i out+ = 0 a, i outC = 0 a output common-mode v ocm 2.20 2.39 2.60 v -40 c < t a < 85 c14 voltage 4.5 v < v dd1 < 5.5 v input supply current i dd1 10.7 15.5 ma 17 23 output supply current i dd2 11.6 14.5 ma v in+ = 200 mv, 18 24 -40 c < t a < 85 c 4.5 v < v dd2 < 5.5 v output short-circuit |i osc | 9.3 ma v out = 0 v or v dd2 25 current
1-222 ac electrical specifications all specifications and figures are at the nominal operating condition of v in+ = 0 v, v in- = 0 v, t a = 25 c, v dd1 = 5.0 v, and v dd2 = 5.0 v, unless otherwise noted. parameter symbol min. typ. max. unit test conditions fig. note rising edge isolation imr r 10 25 kv/ m sv im = 1 kv 19, 20 26 mode rejection falling edge isolation imr f 10 15 kv/ m s mode rejection isolation mode rejection imrr >140 db 19 27 ratio at 60 hz propagation delay to 10% t pd10 2.0 3.3 m s -40 c < t a < 85 c 21, 22 propagation delay to 50% t pd50 3.4 5.6 m s propagation delay to 90% t pd90 6.3 9.9 m s rise/fall time (10%-90%) t r/f 4.3 6.6 m s bandwidth (-3 db) f -3db 50 85 khz 23, 24 bandwidth (-45 )f -45 35 khz rms input-referred v n 300 m v rms bandwidth = 100 khz 25, 26 28 noise power supply rejection psr 5 mv p-p 29 package characteristics all specifications and figures are at the nominal operating condition of v in+ = 0 v, v in- = 0 v, t a = 25 c, v dd1 = 5.0 v, and v dd2 = 5.0 v, unless otherwise noted. parameter symbol min. typ. max. unit test conditions fig. note input-output momentary v iso 3750 v rms t = 1 min., rh 50% 30, 31 withstand voltage* input-output resistance r i-o 10 12 10 13 w t a = 25 cv i-o = 500 vdc 30 10 11 t a = 100 c input-output capacitance c i-o 0.7 pf f = 1 mhz 30 input ic junction-to- q jci 96 c/w 32 case thermal resistance output ic junction-to-case q jco 114 c/w thermal resistance *the input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. for the continuous voltage rating refer to the vde 0884 insulation characteristics table (if applicable), your equipment level safety specification, or hp application note 1074, optocoupler input-output endurance voltage.
1-223 notes: general note: typical values represent the mean value of all characterization units at the nominal operating conditions. typical drift specifications are determined by calculating the rate of change of the speci- fied parameter versus the drift parameter (at nominal operating conditions) for each characterization unit, and then averaging the individual unit rates. the correspond- ing drift figures are normalized to the nominal operating conditions and show how much drift occurs as the particular drift parameter is varied from its nominal value, with all other parameters held at their nominal operating values. figures show the mean drift of all characterization units as a group, as well as the 2-sigma statistical limits. note that the typical drift specifications in the tables below may differ from the slopes of the mean curves shown in the corresponding figures. 1. hp recommends the use of non- chlorine activated fluxes. 2. the hcpl-7800 will operate properly at ambient temperatures up to 100 c but may not meet published specifi- cations under these conditions. 3. dc performance can be best maintained by keeping v dd1 and v dd2 as close as possible to 5 v. see application section for circuit recommendations. 4. hp recommends operation with v in- = 0 v (tied to gnd1). limiting v in+ to 100 mv will improve dc nonlinearity and nonlinearity drift. if v in- is brought above 800 mv with respect to gnd1, an internal test mode may be activated. this test mode is not intended for customer use. 5. although, statistically, the average difference in the output resistance of pins 6 and 7 is near zero, the standard deviation of the difference is 1.3 w due to normal process variations. consequently, keeping the output current below 1 ma will ensure the best offset performance. 6. data sheet value is the average change in offset voltage versus temperature at t a =25 c, with all other parameters held constant. this value is expressed as the change in offset voltage per c change in temperature. 7. data sheet value is the average magnitude of the change in offset voltage versus temperature at t a =25 c, with all other parameters held constant. this value is expressed as the change in magnitude per c change in temperature. 8. data sheet value is the average change in offset voltage versus input supply voltage at v dd1 = 5 v, with all other parameters held constant. this value is expressed as the change in offset voltage per volt change of the input supply voltage. 9. data sheet value is the average change in offset voltage versus output supply voltage at v dd2 = 5 v, with all other parameters held constant. this value is expressed as the change in offset voltage per volt change of the output supply voltage. 10. gain is defined as the slope of the best-fit line of differential output voltage (v out+ - v out- ) versus differential input voltage (v in+ -v in- ) over the specified input range. 11. data sheet value is the average change in gain versus temperature at t a =25 c, with all other parameters held constant. this value is expressed as the percentage change in gain per c change in temperature. 12. data sheet value is the average magnitude of the change in gain versus temperature at t a =25 c, with all other parameters held constant. this value is expressed as the percentage change in magnitude per c change in temperature. 13. data sheet value is the average change in gain versus input supply voltage at v dd1 = 5 v, with all other parameters held constant. this value is expressed as the percentage change in gain per volt change of the input supply voltage. 14. data sheet value is the average change in gain versus output supply voltage at v dd2 = 5 v, with all other parameters held constant. this value is expressed as the percentage change in gain per volt change of the output supply voltage. 15. nonlinearity is defined as the maxi- mum deviation of the output voltage from the best-fit gain line (see note 10), expressed as a percentage of the full-scale differential output voltage range. for example, an input range of 200 mv generates a full-scale differ- ential output range of 3.2 v ( 1.6 v); a maximum output deviation of 6.4 mv would therefore correspond to a nonlinearity of 0.2%. 16. data sheet value is the average change in nonlinearity versus temperature at t a =25 c, with all other parameters held constant. this value is expressed as the number of percentage points that the nonlinearity will change per c change in temperature. for example, if the temperature is increased from 25 c to 35 c, the nonlinearity typically will decrease by 0.01 percentage points (10 c times -0.001 % pts/ c) from 0.2% to 0.19%. 17. data sheet value is the average change in nonlinearity versus input supply voltage at v dd1 = 5 v, with all other parameters held constant. this value is expressed as the number of percentage points that the nonlinearity will change per volt change of the input supply voltage. 18. data sheet value is the average change in nonlinearity versus output supply voltage at v dd2 = 5 v, with all other parameters held constant. this value is expressed as the number of percentage points that the nonlinearity will change per volt change of the output supply voltage. 19. nl 100 is the nonlinearity specified over an input voltage range of 100 mv. 20. because of the switched-capacitor nature of the input sigma-delta converter, time-averaged values are shown. 21. this parameter is defined as the ratio of the differential signal gain (signal applied differentially between pins 2 and 3) to the common-mode gain (input pins tied together and the signal applied to both inputs at the same time), expressed in db. 22. when the differential input signal exceeds approximately 300 mv, the outputs will limit at the typical values shown. 23. the maximum specified input supply current occurs when the differential input voltage (v in+ - v in- ) = 0 v. the input supply current decreases approximately 1.3 ma per 1 v decrease in v dd1 . 24. the maximum specified output supply current occurs when the differential input voltage (v in+ -v in- ) = 200 mv, the maximum recommended operating input voltage. however, the output supply current will continue to rise for differential input voltages up to approximately 300 mv, beyond which the output supply current remains constant.
1-224 figure 1. input offset voltage test circuit. figure 2. input-referred offset drift vs. temperature. 25. short circuit current is the amount of output current generated when either output is shorted to v dd2 or ground. 26. imr (also known as cmr or common mode rejection) specifies the mini- mum rate of rise of an isolation mode noise signal at which small output perturbations begin to appear. these output perturbations can occur with both the rising and falling edges of the isolation-mode wave form and may be of either polarity. when the perturba- tions first appear, they occur only occasionally and with relatively small peak amplitudes (typically 20-30 mv at the output of the recommended application circuit). as the magnitude of the isolation mode transients increase, the regularity and amplitude of the perturbations also increase. see applications section for more information. 27. imrr is defined as the ratio of differential signal gain (signal applied differentially between pins 2 and 3) to the isolation mode gain (input pins tied to pin 4 and the signal applied between the input and the output of the isolation amplifier) at 60 hz, expressed in db. 28. output noise comes from two primary sources: chopper noise and sigma- delta quantization noise. chopper noise results from chopper stabiliza- tion of the output op-amps. it occurs at a specific frequency (typically 200 khz at room temperature), and is not attenuated by the internal output filter. a filter circuit can be easily added to the external post-amplifier to reduce the total rms output noise. the internal output filter does eliminate most, but not all, of the sigma-delta quantization noise. the magnitude of the output quantization noise is very small at lower frequencies (below 10 khz) and increases with increasing frequency. see applications section for more information. 29. data sheet value is the differential amplitude of the transient at the output of the hcpl-7800 when a 1v pk-pk , 1 mhz square wave with 5 ns rise and fall times is applied to both v dd1 and v dd2 . 30. this is a two-terminal measurement: pins 1-4 are shorted together and pins 5-8 are shorted together. 31. in accordance with ul1577, for devices with minimum v iso specified at 3750 v rms , each optocoupler is proof- tested by applying an insulation test voltage greater-than-or-equal-to 4500 v rms for one second (leak current detection limit, i i-o <5 m a). this test is performed before the method b, 100% production test for partial discharge shown in the vde 0884 insulation characteristics table. 32. case temperature was measured with a thermocouple located in the center of the underside of the package. 1 2 3 4 8 7 6 5 hcpl-7800 +5 v +5 v +15 v 0.1 ? 0.1 ? 0.1 ? 0.1 ? 0.33 ? 0.33 ? 10 k 10 k -15 v ad624cd gain = 1000 + - v out 1000 500 0 -500 -40 -20 0 20 40 60 80 100 1500 -1000 t ?temperature ?? a dv ?input-referred offset drift ?? os mean ?2 sigma
1-225 figure 3. input-referred offset drift vs. v dd1 (v dd2 = 5 v). figure 4. input-referred offset drift vs. v dd2 (v dd1 = 5 v). figure 5. gain and nonlinearity test circuit. figure 6. gain drift vs. temperature. figure 7. gain drift vs. v dd1 (v dd2 = 5 v). figure 8. gain drift vs. v dd2 (v dd1 = 5 v). figure 9. 200 mv nonlinearity error plot. 400 200 0 -200 4.4 4.6 4.8 5.0 5.2 5.4 5.6 600 -600 v ?input supply voltage ?v dd1 dv ?input-referred offset drift ?? os -400 mean ?2 sigma 300 200 100 0 4.4 4.6 4.8 5.0 5.2 5.4 5.6 400 -200 v ?output supply voltage ?v dd2 dv ?input-referred offset drift ?? os -100 mean ?2 sigma 1 2 3 4 8 7 6 5 hcpl-7800 +5 v +5 v +15 v 0.1 ? 0.1 ? 0.1 ? 0.1 ? 0.33 ? 0.33 ? 10 k 10 k -15 v ad624cd gain = 1 + - v out 0.01 ? v in 1.5 1.0 0.5 0 -40 -20 0 20 40 60 80 -1.0 t ?temperature ?? a dg ?gain drift?% -0.5 mean ?2 sigma 100 0.5 0 -0.5 -1.0 4.4 4.6 4.8 5.0 5.2 5.4 5.6 -2.0 v ?input supply voltage ?v dd1 -1.5 dg ?gain drift?% mean ?2 sigma 0.5 0.4 0.3 0.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 0 v ?output supply voltage ?v dd2 0.1 dg ?gain drift?% mean ?2 sigma -0.1 0.3 0.2 0.1 0 -0.2 -0.1 0 0.1 0.2 -0.2 v ?input voltage ?v in -0.1 error ?% of full-scale -0.3 mean ?2 sigma
1-226 figure 10. 200 mv nonlinearity drift vs. temperature. figure 11. 200 mv nonlinearity drift vs. v dd1 (v dd2 = 5 v). figure 12. 200 mv nonlinearity drift vs. v dd2 (v dd1 = 5 v). figure 18. typical output supply current vs. input voltage. figure 16. typical input current vs. input voltage. figure 17. typical input supply current vs. input voltage. figure 13. 100 mv nonlinearity error plot. figure 14. typical output voltages vs. input voltage. figure 15. typical input current vs. input voltage. 0.10 0.05 0 -0.05 -40 -20 0 20 40 60 80 100 0.15 -0.10 t ?temperature ?? a dnl ?200 mv non-linearity drift ?% pts 200 mean ?2 sigma 0.04 0.02 0 -0.02 4.6 4.8 5.0 5.2 5.4 5.6 0.06 -0.04 v ?input supply voltage ?v dd1 -0.06 mean ?2 sigma 4.4 dnl ?200 mv non-linearity drift ?% pts 200 0.04 0.02 0 -0.02 4.6 4.8 5.0 5.2 5.4 5.6 0.06 -0.04 v ?output supply voltage ?v dd2 mean ?2 sigma 4.4 dnl ?200 mv non-linearity drift ?% pts 200 0.05 0 -0.05 -0.10 -0.05 0 0.05 0.10 0.10 -0.15 v ?input voltage ?v in error ?% of full-scale -0.10 -0.20 mean ?2 sigma 0.15 3.0 2.5 2.0 1.5 -0.4 -0.2 0 0.2 3.5 1.0 v ?input voltage ?v in -0.6 4.0 v ?output voltage ?v o 0.4 0.6 positive output (pin 7) negative output (pin 6) -400 -600 -800 -1000 -0.1 0 0.1 0.2 -200 -1200 v ?input voltage ?v in -0.2 0 i ?input current ?na in -2 -4 -6 -8 -2 0 2 4 0 -10 v ?input voltage ?v in -4 2 i ?input current ?ma in -6 6 9.5 9.0 8.5 -0.1 0 0.1 0.2 10.0 v ?input voltage ?v in -0.2 10.5 i ?input supply current ?ma dd1 -0.3 0.3 -0.4 0.4 t = -40? t = 25? t = 85? a a a 10.5 10.0 12.0 -0.1 0 0.1 0.2 11.0 v ?input voltage ?v in -0.2 11.5 i ?output supply current ?ma dd2 -0.3 0.3 -0.4 0.4 t = 85? t = 25? t = -40? a a a
1-227 figure 19. isolation mode rejection test circuit. figure 20. typical imr failure waveform. figure 21. typical propagation delays and rise/fall time vs. temperature. 1000 v 0 v v v 50 mv perturbation (definition of failure) 0 v im o 1 2 3 4 8 7 6 5 hcpl-7800 +5 v 78l05 +15 v 0.1 ? 0.1 ? 0.1 ? 0.1 ? 5.11 k 330 pf 1.00 k 1.00 k -15 v op-42 + - v out 0.1 ? in out 9 v v im pulse gen. 5.11 k 330 pf + - 4 2 10 20 40 60 80 6 t ?temperature ?? a 0 8 t ?time ?? -20 100 -40 0 delay to 90% rise/fall time delay to 50% delay to 10%
1-228 figure 22. propagation delay and rise/fall time test circuit. figure 23. typical amplitude and phase response vs. frequency. -3 -4 0 5000 10000 50000 100000 -2 f C frequency C hz 1000 -1 relative amplitude C db 500 100 ? C phase C degrees 0 -15 -30 -45 -60 amplitude phase -5 -10 figure 24. typical 3 db and 45 bandwidths vs. temperature. figure 25. typical rms input-referred noise vs. input voltage. 80 70 48 20 40 60 80 90 0 100 -20 -40 110 44 40 36 32 t ?temperature ?? a f ?3 db bandwidth ?khz -3 db f ?45 degree phase bandwidth ?khz -45 60 28 100 3 db bandwidth 45 degree phase bandwidth 1.5 1.0 150 200 250 2.0 100 2.5 50 0 3.0 v ?input voltage ?mv in v ?rms input-referred noise ?mv n 0.5 0 no bandwidth limiting bandwidth limited to 100 khz bandwidth limited to 10 khz 1 2 3 4 8 7 6 5 hcpl-7800 +5 v +15 v 0.1 ? 0.1 ? 0.1 ? 10.0 k 2.00 k 2.00 k -15 v op-42 + - v out 10.0 k +5 v 0.1 ? 0.01 ? v in 50% v out v in 90% 50% 10% t pd90 t pd50 t pd10 t r/f
1-229 1 2 3 4 8 7 6 5 hcpl-7800 +5 v +15 v 0.01 ? c4 0.1 ? c8 0.1 ? c7 0.1 ? r4 10.0 k w c6 75 pf r1 2.00 k w r2 2.00 k w -15 v mc34081 + - v out c1 0.1 ? c5 75 pf + - motor u2 out c2 0.1 ? hv- hv+ u3 r sense r3 10.0 k w floating positive supply gate drive circuit in r5 39 w u1 78l05 c3 applications information functional description figure 28 shows the primary functional blocks of the hcpl- 7800. in operation, the sigma- delta analog-to-digital converter converts the analog input signal into a high-speed serial bit stream, the time average of which is directly proportional to the input signal. this high speed stream of digital data is encoded and optically transmitted to the detector circuit. the detected signal is decoded and converted into accurate analog voltage levels, which are then filtered to produce the final output signal. to help maintain device accuracy over time and temperature, internal amplifiers are chopper- stabilized. additionally, the encoder circuit eliminates the effects of pulse-width distortion of the optically transmitted data by generating one pulse for every edge (both rising and falling) of the converter data to be transmitted, essentially converting the widths of the sigma-delta output pulses into the positions of the encoder output pulses. a significant benefit of this coding scheme is that any non-ideal characteristics of the led (such as non-linearity and drift over time and temperature) have little, if any, effect on the performance of the hcpl-7800. figure 27. dependence of safety- limiting parameters on ambient temperature. figure 26. recommended application circuit. p s ?power ?mw 0 0 t a ?temperature ?? 180 400 120 40 80 160 100 200 300 output power, p s input power, p s 20 60 100 140 175
1-230 circuit information the recommended application circuit is shown in figure 26. a floating power supply (which in many applications could be the same supply that is used to drive the high-side power transistor) is regulated to 5 v using a simple three-terminal voltage regulator. the input of the hcpl-7800 is connected directly to the current sensing resistor. the differential output of the isolation amplifier is converted to a ground-referenced single-ended output voltage with a simple differential amplifier circuit. although the application circuit is relatively simple, a few general recommendations should be followed to ensure optimal performance. as shown in figure 26, 0.1 m f bypass capacitors should be located as close as possible to the input and output power supply pins of the hcpl-7800. notice that pin 2 (v in+ ) is bypassed with a 0.01 m f capacitor to reduce input offset voltage that can be caused by the combination of long input leads and the switched- capacitor nature of the input circuit. with pin 3 (v in- ) tied directly to pin 4 (gnd1), the power-supply return line also functions as the sense line for the negative side of the current-sensing resistor; this allows a single twisted pair of wire to connect the isolation amplifier to the sense resistor. in some applications, however, better performance may be obtained by connecting pins 2 and 3 (v in+ and v in- ) directly across the sense resistor with twisted pair wire and using a separate wire for the power supply return line. both input pins should be bypassed with 0.01 exhibit better offset performance than op-amps with jfet or mosfet input stages. in addition, the op-amp should also have enough bandwidth and slew rate so that it does not adversely affect the response speed of the overall circuit. the post-amplifier circuit includes a pair of capacitors (c5 and c6) that form a single-pole low-pass filter; these capacitors allow the bandwidth of the post-amp to be adjusted independently of the gain and are useful for reducing the output noise from the isolation amplifier. many different op-amps could be used in the circuit, including: mc34082a (motorola), tl032a, tlo52a, and tlc277 (texas instruments), lf412a (national semiconductor). the gain-setting resistors in the post-amp should have a tolerance of 1% or better to ensure adequate cmrr and adequate gain tolerance for the overall circuit. resistor networks can be used that have much better ratio tolerances than can be achieved using discrete resistors. a resistor network also reduces the total number of components for the circuit as well as the required board space. the current-sensing resistor should have a relatively low value of resistance to minimize power dissipation, a fairly low inductance to accurately reflect high-frequency signal compo- nents, and a reasonably tight tolerance to maintain overall circuit accuracy. although decreasing the value of the sense resistor decreases power dissipation, it also decreases the full-scale input voltage making iso-amp offset voltage effects more significant. these two m f capacitors close to the isolation amplifier. in either case, it is recommended that twisted- pair wire be used to connect the isolation amplifier to the current- sensing resistor to minimize electro-magnetic interference of the sense signal. to obtain optimal cmr perfor- mance, the layout of the printed circuit board (pcb) should minimize any stray coupling by maintaining the maximum possible distance between the input and output sides of the circuit and ensuring that any ground plane on the pcb does not pass directly below the hcpl- 7800. an example single-sided pcb layout for the recommended application circuit is shown in figure 29. the trace pattern is shown in x-ray view as it would be seen from the top of the pcb; a mirror image of this layout can be used to generate a pcb. an inexpensive 78l05 three- terminal regulator is shown in the recommended application circuit. because the performance of the isolation amplifier can be affected by changes in the power supply voltages, using regulators with tighter output voltage tolerances will result in better overall circuit performance. many different regulators that provide tighter output voltage tolerances than the 78l05 can be used, including: tl780-05 (texas instruments), lm340laz-5.0 and lp2950cz- 5.0 (national semiconductor). the op-amp used in the external post-amplifier circuit should be of sufficiently high precision so that it does not contribute a significant amount of offset or offset drift relative to the contribution from the isolation amplifier. generally, op-amps with bipolar input stages
1-231 figure 28. hcpl-7800 block diagram. figure 29. pc board trace pattern and loading diagram example. voltage regulator clock generator sd modulator encoder led drive circuit detector circuit decoder and d/a filter iso-amp output voltage regulator iso-amp input isolation boundary conflicting considerations, therefore, must be weighed against each other in selecting an appropriate sense resistor for a particular application. to maintain circuit accuracy, it is recommended that the sense resistor and the isolation amplifier circuit be located as close as possible to one another. although it is possible to buy current- sensing resistors from established vendors (e.g., the lvr-1, -3 and -5 resistors from dale), it is also possible to make a sense resistor using a short piece of wire or even a trace on a pc board. figures 30 and 31 illustrate the response of the overall isolation amplifier circuit shown in figure 26. figure 30 shows the response of the circuit to a 200 mv 20 khz sine wave input and figure 31 the response of the circuit to a 200 mv 20 khz square wave input. both figures demonstrate the fast, well-behaved response of the hcpl-7800. figure 32 shows how quickly the isolation amplifier recovers from an overdrive condition generated by a 2 khz square wave swinging between 0 and 500 mv (note that the time scale is different from the previous figures). the first wave form is the output of the application circuit with the filter capacitors removed to show the actual response of the isolation amplifier. the second wave form is the response of the same circuit with the capacitors installed. the recovery time and overshoot are relatively independent of the amplitude and polarity of the overdrive signal, as well as its duration. for more information, refer to application note 1059.
1-232 figure 30. application circuit sine wave response. figure 31. application circuit square wave response. figure 32. application circuit overload recovery waveform.

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